12 Pages, 182 KB, Original
Logic and Timing, 2.5V/3.3V ECL/PECL/HSTL/LVDS 2/4,4/5/6 Clock Generation Chip
12 Pages, 182 KB, Original
Logic and Timing, 2.5V/3.3V ECL/PECL/HSTL/LVDS 2/4,4/5/6 Clock Generation Chip, Tape and Reel
9 Pages, 385 KB, Original
100E SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9 Pages, 385 KB, Original
100E SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20