18 Pages, 266 KB, Original
Low Voltage, Zero Power E 2 CMOS PLD Generic Array Logic
18 Pages, 266 KB, Original
SPLD: GAL16LV8ZD Family: EECMOS Process: 8 Macro Cells: 8 Reg.: 8 User I/Os: 3.3V Supply Voltage: 15 Speed Grade: 20-LDCC