LS642FP HD74LS642FPEL HD74LS642P HD74LS642P HD74LS642RP HD74LS642RPEL HD74LS645-1P HD74LS645-1P HD74LS645FP HD74LS645FP HD74LS645FPEL HD74LS645P HD74LS645P HD74LS645RP HD74LS645RPEL HD74LS669P HD74LS669RPEL HD74LS73AP HD74LS73ARP HD74LS73ARPEL HD74LS74AFP HD74LS74AFPEL HD74LS74AP HD74LS74ARP HD74LS74ARPEL HD74LS75FP HD74LS75FPEL HD74LS75P HD74LS75RPEL HD74LS85FP Competition Competitor Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Hitachi America Renesas Technology Corp. Renesas Technology Corp. Hitachi America Renesas Technology Corp. Hitachi America Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Renesas Technology Corp. Hitachi America Renesas Technology Corp. Renesas T
HD74LS74AFPEL SOP-14 pin (JEITA) HD74LS74ARPEL SOP-14 pin (JEDEC) PRSP0014DF-B (FP-14DAV) PRSP0014DE-A (FP-14DNV) Package Abbreviation Taping Abbreviation (Quantity) P -- FP EL (2,000 pcs/reel) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement 1CLR 1 1D 2 1CK 3 1PR 4 1Q 5 D 1Q 6 CLR Q GND 7 CK D PR CLR Q Q CK PR Q (Top view) Rev.3.00, Jul.22.2005, page 1 of 7 14 VCC 13 2CLR 12 2D 11 2CK 10 2PR 9 2Q 8 2Q HD74LS74A Function Table Input Output Preset L Clear H Clock X D X Q H Q L H L L L X X X X L H* H H* H H H H H L H L L H H H L X Q0 Q0 H; high level, L; low level, X; irrelevant, ; transition from low to high level, Q0; level of Q before the indicated steady-state input conditions were established. Q0; complement of Q0 or level of Q before the indicated steady-state input conditions were established. *;This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive (high) level. Absol
ronics. HD74LS74A Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear) REJ03D0415-0300 Rev.3.00 Jul.22.2005 Features * Ordering Information Package Code (Previous Code) PRDP0014AB-B (DP-14AV) Part Name Package Type HD74LS74AP DILP-14 pin HD74LS74AFPEL SOP-14 pin (JEITA) HD74LS74ARPEL SOP-14 pin (JEDEC) PRSP0014DF-B (FP-14DAV) PRSP0014DE-A (FP-14DNV) Package Abbreviation Taping Abbreviation (Quantity) P -- FP EL (2,000 pcs/reel) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement 1CLR 1 1D 2 1CK 3 1PR 4 1Q 5 D 1Q 6 CLR Q GND 7 CK D PR CLR Q Q CK PR Q (Top view) Rev.3.00, Jul.22.2005, page 1 of 7 14 VCC 13 2CLR 12 2D 11 2CK 10 2PR 9 2Q 8 2Q HD74LS74A Function Table Input Output Preset L Clear H Clock X D X Q H Q L H L L L X X X X L H* H H* H H H H H L H L L H H H L X Q0 Q0 H; high level, L; low level, X; irrelevant, ; transition from low to high level, Q0; level of Q before the indicated steady-state input conditions wer
ear) R04DS0012EJ0400 (Previous: REJ03D0415-0300) Rev.4.00 Dec 21, 2011 Features Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS74AP DILP-14 pin PRDP0014AB-B (DP-14AV) P -- HD74LS74AFPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP EL (2,000 pcs/reel) HD74LS74ARPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement 1CLR 1 1D 2 1CK 3 1PR 4 1Q 5 D 1Q 6 CLR Q GND 7 CK D PR CLR Q Q CK PR Q 14 VCC 13 2CLR 12 2D 11 2CK 10 2PR 9 2Q 8 2Q (Top view) Function Table Input Output Preset L H L H H Clear H L L H H Clock X X X D X X X H L Q H L H* H L Q L H H* L H H H L X Q0 Q0 H; high level, L; low level, X; irrelevant, ; transition from low to high level, Q0; level of Q before the indicated steady-state input conditions were established. Q0; complement of Q0 or level of Q before the indicated steady-state input conditions w