rom PC-SPEAKER LINE-L PC-BEEP 10K R15 4.7K C4 100p option 1: For ALC650 rev.D, select this bias circuit to share MIC-In and CEN/LFE-Out +5VA GPIO0 = 0, Q4 ON, Q1 OFF, cut off MIC bias GPIO0 = 1, Q4 OFF, Q1 On, supply MIC bias D2 DIODE +5VA R33 0 R58 10k 1 2N7000P/TO +3.3VDD Q1 2 R35 1 3 Q4 R34 10K option 2: For ALC650 rev.E, select this bias circuit to share MIC-In and CEN/LFE-Out 1k 3 4.7K 2N7000P/TO R59 2 C6 1uF Vrefout GPIO0 R36 4.7K If MIC-IN is designed to be shared with CEN/LFE-Out, keep 2/3 are floated R37 PH7 1K MIC2 2 3 MIC1 MIC IN (Can be CEN/LFE-Out) R38 CE3 100p 1K C7 4700pf CE4 100p C8 4700pf Reserved, default open Analog I/O connection of the ALC650 Six-Channel AC'97 2.3 Audio Codec 38 Rev1.3 ALC650 DataSheet (R16, R17 not mounted if front panel header mounted) 0 / 22 R17 0 / 22 Front-R Front-L (AUD-RET-L) LINE OUT R19 R20 100K 100K 1 3 5 7 9 Block-A If AVDD is supplied by 78L05 has only 100mA current, change R16 and R17 to 20ohm to limit current consumption. Block-A: t
to switch bias voltage as option1/option3 circuit. option 1: For ALC650 rev.D, select this bias circuit to share MIC-In and CEN/LFE-Out +5VA GPIO0 = 0, Q4 ON, Q1 OFF, cut off MIC bias GPIO0 = 1, Q4 OFF, Q1 On, supply MIC bias D2 DIODE +5VA R33 0 R58 10k 1 2N7000P/TO +3.3VDD Q1 2 R35 1 3 Q4 R34 10K 2N7000P/TO R59 2 4.7K option 2: For ALC650 rev.E or later, select this bias circuit to share MIC-In and CEN/LFE-Out 3 1k C6 1uF Vrefout GPIO0 R36 4.7K If MIC-IN is designed to be shared with CEN/LFE-Out, keep 2/3 are floated R37 PH7 1K MIC2 2 3 MIC1 R38 MIC IN (Can be CEN/LFE-Out) CE3 100p 1K C7 4700pf CE4 100p C8 4700pf Reserved, default open 2002/10/04 3 Rev.1.6 ALC650 In order to share LINE/MIC input jacks with Surround/Center/LFE output, system designers must follow the information in the illustration above to modify jack circuits. Pins 2 and 3 should not be grounded. 2002/10/04 4 Rev.1.6 ALC650 4. Saving 24.576MHz Crystal The ALC650 has a built in 14.318MHz to 24.576MHz phase-lock-loop
n efficiency. Depending on the application, additional air space should be provided to adequately cool Ri and avoid damaging heat sensitive components. Fig. 8b shows an SMPS start-up circuit using !1, the IXCP 10M45S switchable current regulator and M1, a 2N7000P MOSFET, to switch 11 on and off. Only during the first 10 ms to 20 ms of SMPS start-up does I1 need to be on to supply up to 10 mA, which is set by Rl = 300 . It is commanded off during all other times. The additional average power dissipation due to this start-up circuit during normal operation, ie after Mi has turned I1 off, is proportional to the square of the voltage across R2. +34V - 370VCDC) = 11K Rl J isw Zh C1 10uF INS5246B Fig. 8a Standard start-up circuit for SMPS +34V - 37CVCDC) Il IXCPLOM45$ 2N7000P/ | ~ Fig. 8b SMPS start-up circuit using IXCP 10M45S This approximately 0.5 mW, assuming V = 16 V and R2 = 470 kQ. As such, minimal heat build-up will occur in the IXCP 10M45S, eliminating potential problems to heat s
FETs -- TO-92 N-Channel P-Channel N-Channel 1 1 1.5 0.45 500 1500 5 5 ZVN0545A-ND ZVNL535A-ND ZVN4424A-ND BS107P-ND ZVNL120A-ND ZVN2110A-ND ZVN3310A-ND ZVN4310A-ND ZVN4210A-ND ZVNL110A-ND ZVN4206A-ND ZVN2106A-ND ZVN3306A-ND VN10LP-ND BS170P-ND ZVN4306A-ND 2N7000P-ND ZVP0545A-ND ZVP4424A-ND ZVP2120A-ND ZVP2110A-ND ZVP3310A-ND ZVP2106A-ND ZVP3306A-ND ZVP4105A-ND BS250P-ND Drivers) 0.7 -- ZVN4206AV-ND ZVN4306AV-ND 2.76 2.07 1.68 1.08 1.38 1.02 .75 2.10 1.26 1.02 1.02 1.02 .75 .75 .75 2.10 .75 3.09 1.74 1.38 1.23 .99 1.23 .99 1.23 .69 20.70 15.53 12.60 8.10 10.35 7.65 5.63 15.75 9.45 7.65 7.65 7.65 5.63 5.63 5.63 15.75 5.63 23.18 13.05 10.35 9.23 7.43 9.23 7.43 9.23 5.18 124.20 93.15 75.60 48.60 62.10 45.90 37.50 94.50 56.70 45.90 45.90 45.90 37.50 37.50 37.50 94.50 37.50 139.05 78.30 62.10 55.35 44.55 55.35 44.55 55.35 34.50 782.00 586.50 476.00 306.00 391.00 289.00 250.00 595.00 357.00 289.00 289.00 289.00 250.00 250.00 250.00 595.00 250.00 875.50 493.00 391.00 348.50 280.50 348.50 280.50 348.50 23
2N7000P MODE VERTICAL DMOS FET ISSUE ",.. ENHANCEMENT I 94 FEATURES * 60 Volt VcEo *R 0S(0.) = 5 `2 D G s v ABSOLUTE MAXIMUM lJ&h!sJ RATINGS. SYMBOL PARAMETER Drain-Source Voltage Continuous Pulsed Power `DS Drain Current Operating and Storage Drain-Source Voltage Gate-Source --Gate-Body Breakdown Threshold Voltage -- Leakage Zero Gate Voltege MIN. BVDss 60 `GS(th) _ 0.8 ------. On-State -----.-- -- .---- ~~ Drain Current(1) --.-- .---- ID(m) Static Drain-Source Voltage (1) On-State `DS(on) Static Drain-Source Resistance (1) On-State RDs& (2) __, _ Common Source Capacitance (2) Output +150 \ UNIT CONDITIONS. v ID=l OIA, VGsOV v lD=lmA, 10 nA-- - `" vG@ 1 1 UA mA -- VD~48V, VDs48V, VG~O VG~OV, mA VDSIOV, VGF4.5V V v VGs.=10V,lD.500mA 2.5 0.4 5 T `; "- VD= 15V, "c .-- VGs vD~=ov T=125C(2) ;;~;;;$;%--- AL-P-E.-.; Capacitance I c 0ss 1 --. ----- Transfer 2A. -55to 1' input Capacitance ----. .----. ------ `Reve;se mW ----- q+f 75 ~ v -1 3 lD~s mA i 40 -- MAX. lGSS Drain Current v mA -- Ti:T~tg SYMBOL
10 75 $0T223 ZVN2106A 60 0.45 8 0.8 2.4 2 10 75 E-Line ZVN4106F 60 0.2 3 1.3 3 5 5 35 $OT23 ZVN3306A 60 0.27 3 0.8 2.4 5 10 35 | ELine ZVN3306F 60 0.15 3 0.8 2.4 5 10 35 =|: SOT23 BS170P 60 0.27 3 0.8 3 5 10 - | E-Line BS170F 60 0.15 3 0.8 3 5 10 - | 0T23 2N7000P 60 0.2 0.5 0.8 3 5 10 60 | E-Line 2N7000 60 02 | 0.5 0.8 3 5 10 60 ~TOs2 2N7002. 60 0.115 | 0.8 1 25 7.5 50 $OT23 VNI1OLP 60 0.27 | 3 0.8 2.5 7.5 | 60 E-Line VN2222LL 60 015 1 0.6 2.5 75 10 = 60 | To92 VN1OLE 60 s 3 0.8 25 7.5 60s SOT23 BSS138 50 | 02. | 0.8 0.5 1.5 35 | 5 50 | S0OT23 Notes: 1) The devices suffixed V are Avalanche Rated. 2) The E-Line package is similar in style and pin compatible with TO92. SOT223 E-Line SOT23 SMB TOS2 N-Channel es {7092 style} ee m\ D ; D & \ G G S D s G D , G s Tape and Reel Information - see section 12 > 3-4
efficiency. Depending on the application, additional air space should be provided to adequately cool R14 and avoid damaging. heat sensitive components. Fig. 8b shows an SMPS start-up circuit using I1, the IXCP 10M45S switchable current regulator and M1, a 2N7000P MOSFET, to switch I1 on and off. Only during the first 10 ms to 20ms of SMPS start-up does i1 need to be on to supply up to 10 mA, which is set by Rt = 300 2. It is commanded off during ail other times. The additional average power dissipation due to this start-up circuit during normal operation, ie after M1 has turned [1 off, is proportional to the square of the voltage across R2. Fig. 8a Standard start-up circuit for SMPS * Arty) Fig. 8b SMPS start-up circuit using IXCP 10M45S This approximately 0.5 mW, assuming V = 16 V and R2 = 470 k&. As such, minimal heat build-up will occur in the IXCP 10M45S, eliminating potential problems to heat sensitive components. Any reduction in power dissipation in the start-up circuit translates directly
2N7000P MODE VERTICAL DMOS FET ISSUE 2 - MARCH 94 FEATURES * 60 Volt Vig, Ros(on) = 5 2 D Ss E-Line TO92 Compatible ABSOLUTE MAXIMUM RATINGS. PARAMETER SYMBOL VALUE UNIT Drain-Source Voltage Vos 60 V Continuous Drain Current at T,,,,=25C Ip 200 mA Pulsed Drain Current lom 500 mA Gate-Source Voltage Ves +40 V Power Dissipation at T,,,=25C Prot 400 mW Operating and Storage Temperature Range TT stg -5 to +150 C ELECTRICAL CHARACTERISTICS (at Tamb = 25C unless otherwise stated). PARAMETER SYMBOL] MIN. | MAX.| UNIT) CONDITIONS. Drain-Source Breakdown BVoss 60 Vv Ip=10pA, Vgg=OV Voltage Gate-Source Threshold Voltage | Vesiny | 9-8 3 V Ip=ImA, Vos= Ves Gate-Body Leakage less 10 nA | Vgget 15V, Vpg=0V Zero Gate Voltage Drain Current} Ings 1 LA Vos=48V, Vgg=0 1 mA | Vps=48V, Vgg=0V, T=125C(2) On-State Drain Current(1) IDion) 75 MA | Vog=10V, Vag=4.5V Static Drain-Source On-State Vpsion) 2.5 V Vgg=10V,Ip=500mA Voltage (1) 0.4 Vv Vgg=4.5V Ip=75mA Static Drain-Source On-State Rosion) 5 Vgg=10V,Ip=500mA Resis
2N7000P ISSUE 2 - MARCH 94 FEATURES * 60 Volt VCEO * RDS(on) = 5 D G S E-Line TO92 Compatible ABSOLUTE MAXIMUM RATINGS. PARAMETER SYMBOL VALUE UNIT Drain-Source Voltage V DS 60 V Continuous Drain Current at T amb=25C ID 200 mA Pulsed Drain Current I DM 500 mA Gate-Source Voltage V GS 40 V Power Dissipation at T amb=25C P tot 400 mW Operating and Storage Temperature Range T j:T stg -55 to +150 C ELECTRICAL CHARACTERISTICS (at Tamb = 25C unless otherwise stated). PARAMETER SYMBOL MIN. Drain-Source Breakdown Voltage BV DSS 60 Gate-Source Threshold Voltage V GS(th) 0.8 Gate-Body Leakage MAX. UNIT CONDITIONS. V I D=10A, V GS=0V 3 V ID=1mA, V DS= V GS I GSS 10 nA V GS= 15V, V DS=0V Zero Gate Voltage Drain Current I DSS 1 1 A mA V DS=48V, V GS=0 V DS=48V, V GS=0V, T=125C (2) On-State Drain Current(1) I D(on) mA V DS=10V, V GS=4.5V Static Drain-Source On-State Voltage (1) V DS(on) 2.5 0.4 V V V GS=10V,I D=500mA V GS=4.5V,I D=75mA Static Drain-Source On-State Resistance (1) R DS(on) 5 V GS=10V,I D=500mA m
8 2.4 1 10 500 10 40 DGS ZVN1409A 90 10 0.04 0.8 2.4 0.1 250 5 10 6.5 DGS ZVN4306A 60 1100 20 1.3 3 1 0.45 1500 5 350 DGS ZVN4206A* 60 600 8 1.3 3 1 1.5 500 5 100 DGS ZVN4206C 60 600 8 1.3 3 1 1.5 500 5 100 GDS ZVN2106A 60 450 8 0.8 2.4 1 2 1000 10 75 DGS 2N7000P 60 200 0.5 0.8 3 1 5 500 10 60 DGS ZVN3306A 60 270 3 0.8 2.4 1 5 500 10 35 DGS VN10LP 60 270 3 0.8 2.5 1 75 200 5 60 DGS BS170P 60 270 3 0.8 3 1 5 200 10 60 DSG P-CHANNEL ZVPO0545A -450 -45 -0.4 -1.5 -4.5 -1 150 -50 -10 120 DGS ZVP0540A -400 45 -0.4 -1.5 4.5 -1 150 -50 -10 120 DGS ZVP0535A -350 -50 -0.48 -1.5 -4.5 1 100 -50 -10 120 DGS ZVP4424A -240 -200 ~1 -0.8 -2.5 -1 15 -100 -3.5 - DGS ZVP2120A -200 -120 -1.2 -1.5 -4.5 -1 25 -150 -10 100 DGS ZVP2120C -200 -120 1.2 1.5 45 1 25 -150 -10 100 GDS ZVP0120A -200 -110 -1 -1.5 4.5 -1 32 -125 -10 100 DGS ZVP1320A -200 -70 -0.4 -1.5 -4.5 -1 80 -50 -10 50 DGS ZVP2110A -100 -230 3 -1.5 4.5 -1 8 -375 -10 100 DGS ZVP2110C -100 -230 -3 -1.5 4.5 -1 8 -375 -10 100 GDS ZVP3310A ~100 ~140 1.2 -1.5 -4.5
n efficiency. Depending on the application, additional air space should be provided to adequately cool R1 and avoid damaging heat sensitive components. Fig. 8b shows an SMPS start-up circuit using I1, the IXCP 10M45S switchable current regulator and M1, a 2N7000P MOSFET, to switch I1 on and off. Only during the first 10 ms to 20 ms of SMPS start-up does I1 need to be on to supply up to 10 mA, which is set by R1 = 300 . It is commanded off during all other times. The additional average power dissipation due to this start-up circuit during normal operation, ie after M1 has turned I1 off, is proportional to the square of the voltage across R2. A (+) K (-) Fig. 8b SMPS start-up circuit using IXCP 10M45S This approximately 0.5 mW, assuming V = 16 V and R2 = 470 k. As such, minimal heat build-up will occur in the IXCP 10M45S, eliminating potential problems to heat sensitive components. Any reduction in power dissipation in the start-up circuit translates directly A G K In Fig. 9, the IXCP 10M45S, IC1,