2N7000CSM MECHANICAL DATA Dimensions in mm (inches) N-CHANNEL ENHANCEMENT MODE MOS TRANSISTOR 0.31 rad. (0.012) 3 FEATURES 2 0.76 0.15 (0.03 0.006) 2.54 0.13 (0.10 0.005) 0.51 0.10 (0.02 0.004) 1 1.91 0.10 (0.075 0.004) * V(BR)DSS = 60V * RDS(ON) = 5 A 0.31 rad. (0.012) 3.05 0.13 (0.12 0.005) A= * ID = 200mA 1.40 (0.055) max. 1.02 0.10 (0.04 0.004) * Hermetic Ceramic Surface Mount package * Screening Options Available SOT23 CERAMIC (LCC1 PACKAGE) Underside View PAD 1 - Gate PAD 2 - Source PAD 3 - Drain ABSOLUTE MAXIMUM RATINGS (TCASE = 25C unless otherwise stated) VDS Drain - Source Voltage 60V VGS Gate - Source Voltage 40V ID Drain Current IDM Pulsed Drain Current * PD Power Dissipation Tj Operating Junction Temperature Range -55 to 150C Tstg Storage Temperature Range -55 to 150C @ TCASE = 25C 200mA 500mA @ TCASE = 25C 300mW * Pulse width limited by maximum junction temperature. Semelab Plc reserves the right to change test conditions, parameter limits and package dimensions without notice. Info

2N7000A TECHNICAL DATA N CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR INTERFACE AND SWITCHING APPLICATION. FEATURES B C *High density cell design for low RDS(ON). A *Voltage controolled small signal switch. *Rugged and reliable. *High saturation current capablity. N E K G J D MAXIMUM RATING (Ta=25) RATING UNIT H F Drain-Source Voltage VDSS 60 V Drain-Gate Voltage (RGS1) VDGR 60 V Gate-Source Voltage VGSS 20 V ID 200 IDP 500 Drain Power Dissipation PD 400 mW Junction Temperature Tj 150 Tstg -55150 Continuous Drain Current Pulsed Storage Temperature Range L F 1 2 C SYMBOL 3 MILLIMETERS 4.70 MAX 4.80 MAX 3.70 MAX 0.45 1.00 1.27 0.85 0.45 _ 0.50 14.00 + 0.55 MAX 2.30 0.45 MAX 1.00 M CHARACTERISTIC DIM A B C D E F G H J K L M N 1. SOURCE 2. GATE 3. DRAIN mA TO-92 EQUIVALENT CIRCUIT D G S THIS TRANSISTOR IS ELECTROSTATIC SENSITIVE DEVICE. PLEASE HANDLE WITH CAUTION. ELECTRICAL CHARACTERISTICS (Ta=25) CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Drain-Source Breakdown Voltage BVDSS VGS=0

2N7000 Vishay Semiconductors formerly General Semiconductor DMOS Transistor (N-Channel) TO-226AA (TO-92) 0.142 (3.6) min. 0.492 (12.5) 0.181 (4.6) 0.181 (4.6) Features * * * * * * * * max. 0.022 (0.55) High input impedance Low gate threshold voltage Low drain-source ON-resistance High-speed switching No minority carrier storage time CMOS logic compatible input No thermal runaway No secondary breakdown Mechanical Data 0.098 (2.5) Dimensions in inches and (millimeters) Case: TO-92 Plastic Package Weight: approx. 0.18g Packaging Codes/Options: E7/4K per Ammo tape, 20K/box Bottom View Maximum Ratings and Thermal Characteristics Parameter (TA = 25C unless otherwise noted) Symbol Limit Unit Drain-Source Voltage VDSS 60 V Drain-Gate Voltage VDGS 60 V Gate-Source-Voltage VGS 20 V ID 300 mA IDM 1.3 A Drain Current (continuous) Peak Drain Current (pulsed) Power Dissipation at Tamb = 25C Thermal Resistance Junction to Ambient Air Ptot RJA (1) mW (1) C/W 830 150 Junction Temperature Tj 150 C Storage Temperat

2N7000K 60V N-Channel MOSFET TO-92 PRODUCT SUMMARY Pin Definition: 1. Source 2. Gate 3. Drain VDS (V) 60 Features RDS(on)() ID (mA) 5 @ VGS = 10V 100 5.5 @ VGS = 5V 100 Block Diagram Low On-Resistance ESD Protection High Speed Switching Low Voltage Drive Ordering Information Part No. Package Packing TSM2N7000KCT B0 TSM2N7000KCT A3 TO-92 TO-92 1Kpcs / Bulk 2Kpcs / Ammo N-Channel MOSFET Absolute Maximum Rating (Ta = 25oC unless otherwise noted) Parameter Symbol Limit Unit Drain-Source Voltage VDS 60 V Gate-Source Voltage VGS 20 V Continuous @ TA=25C ID 300 Pulsed IDM 700 Continuous @ TA=25C IDR 300 Pulsed IDMR 700 Maximum Power Dissipation PD 400 Operating Junction Temperature TJ +150 o TJ, TSTG -55 to +150 o Symbol Limit Unit TL 10 S RJA 357 C/W Drain Current Drain Reverse Current Operating Junction and Storage Temperature Range mA mA mW C C Thermal Performance Parameter Lead Temperature (1/8" from case) Junction to Ambient Thermal Resistance (PCB mounted) Notes: a. Pulse

2N7000 60 5 75 TO- 92 2N7002 60 7.5 500 SOT- 23 BS170 60 5 75 TO- 92 VN0610LL 60 7.5 750 TO- 92 VN0605T 60 5 500 SOT- 23 VN10KT* 60 5 750 SOT- 23 VN2222LL 60 7.5 750 TO- 93 * Zener gat e Prot ect ed Ch a n n e l N N N N N N N

ed with JEDEC 6-17 CT~Siliconix VNDS06 ^LM incorporated N-Channel Enhancement-Mode MOSFET DESIGNED FOR: Switching Amplification TYPE PACKAGE Single TO-206AC FEATURES * * Low rns(on) < 10 SI Low Cost Surface Mount Package SOT-23 Quad 7-148 * VN10LE TO-92 * 2N7000, 2N7008 VN0603L, VN0610LL VN2222LL TO-237 * SOT-23 * VN0603T, VN0605T 2N7002 VN2222LM 14-Pin Plastic * VQ1000J 14-Pin Dual-lnLine * VQ1000P Chip GEOMETRY DIAGRAM DEVICE * Available as above specifications

rownout Detector ______________________________________________________________________________________ POWER-FAIL WARNING Microprocessor Voltage Monitor with Dual Over/Undervoltage Detection ICL7665 VCC TO CMOS MEMORY Q1 LINE-POWERED +5V INPUT 100k 1F 1k 2N7000 2N4393 1M OUT1 V+ HYST1 HYST2 5.6M 22M ICL7665 2.4M SET1 3V LITHIUM CELL 1.15M 1% SET2 1M GND 1M 1% OUT2 220 Figure 11. Battery Switchover Circuit 9V V+ TEMPERATURE SENSOR (GENERAL PURPOSE NPN TRANSISTOR) HYST2 R3 470k R4 22M R6 22M ICL7665 SET2 R1, 1M HIGHTEMPERATURE LIMIT ADJUSTMENT HYST1 SET1 R5 27k OUT2 LOW-TEMPERATURE LIMIT ADJUST OUT1 R7 1.5M R2 1M ALARM SIGNAL FOR DRIVING LEDS, BELLS, ETC. Figure 12. Simple High/Low Temperature Alarm ______________________________________________________________________________________ 11 ICL7665 Microprocessor Voltage Monitor with Dual Over/Undervoltage Detection _______________________SCR Latchup Like all junction-isolated CMOS circuits, the ICL7665 has an inherent four-layer or SCR structure tha

round BUS MASTER CIRCUIT Figure & \ 12V A) Open Drain BUS MASTER 10kQ DSs000 OR 8051 EQUIVALENT VPO300L 5kQ TOKO | 5 vpoipeNs ees) Open Drain _[ BSS110 ort Pin R 5 D _p- Jodata connection >N7000 . of DS2502 T D | 470 pF PGM 8 y Capacitor added to reduce L 2N7000 coupling on data line due to 2N7000 B) Standard TTL dD | BUS MASTER 12 Vop (10 mA min.} 5kQ PROGRAMMING PULSE TTL-Equivalent on Ss To data connection of DS2502 v 111797 14/21DS2502 ROM FUNCTIONS FLOW CHART Figure 9 33h READ ROM COMMAND MASTER Tx RESET PULSE Y DS2502 Ty PRESENCE PULSE ' MASTER Tx ROM FUNCTION COMMAND 55h MATCH ROM COMMAND FOh SEARCH ROM COMMAND CCh SKIP ROM COMMAND DS2502 Ty BIT O DS2502 Ty FAMILY MASTER Tx BIT 0 DS2502 Tx BIT oO 1 BYTE MASTER Tx BITO BITO N BITO MATCH? MATGH? Y DS2502 Ty BIT 1 DS2502 Tx SERIAL NUMBER MASTER Tx BIT 1 DS2502 Tx BIT 1 6 BYTES MASTER Ty BIT 1 N N DS2502 Ty CRC BYTE AY ~Y DS2502 Ty BIT 63 MASTER Tx BIT 63 Dspso? Ty BIT 63 MASTER Tx BIT 63 N BIT 63 BIT 63 MATCH? MATCH? ~ . MASTER T

hat the peak inductor or LED current does not exceed 300 mV / RSNS. LOW POWER SHUTDOWN The LM3404/04HV can be placed into a low power state (IINSD = 90 A) by grounding the RON pin with a signal-level MOSFET as shown in Figure 3. Low power MOSFETs like the 2N7000, 2N3904, or equivalent are recommended devices for putting the LM3404/04HV into low power shutdown. Logic gates can also be used to shut down the LM3404/04HV as 20205413 FIGURE 3. Low Power Shutdown www.national.com 12 BUCK CONVERTERS WITH OUTPUT CAPACITORS A capacitor placed in parallel with the LED or array of LEDs can be used to reduce the LED current ripple while keeping the same average current through both the inductor and the LED array. This technique is demonstrated in Design Examples 1 and 2. With this topology the output inductance can be lowered, making the magnetics smaller and less expensive. Alternatively, the circuit could be run at lower frequency but keep the same inductor value, improving the efficiency and expanding the

2N7000Z Power MOSFET 115m Amps, 60 Volts N-CHANNEL ENHANCEMENT MODE MOSFET DESCRIPTION 1 The UTC 2N7000Z has been designed to minimize on-state resistance to provide rugged, reliable, and fast switching performance. It can be used in most applications requiring up to 400mA DC and can deliver pulsed currents up to 2A. The product is particularly suited for low voltage, low current applications, such as small servo motor control, power MOSFET gate drivers and other switching applications TO-92 FEATURES *High density cell design for low RDS(ON) *Voltage controlled small signal switch *Rugged and reliable *High saturation current capability SYMBOL 3.Drain 2.Gate 1.Source ORDERING INFORMATION Ordering Number Package Lead Free Halogen Free 2N7000ZL-T92-B 2N7000ZG-T92-B TO-92 2N7000ZL-T92-K 2N7000ZG-T92-K TO-92 2N7000ZL-T92-R 2N7000ZG-T92-R TO-92 Note: Pin Assignment: G: Gate D: Drain S: Source www.unisonic.com.tw

hat the peak inductor or LED current does not exceed 300 mV / RSNS. LOW POWER SHUTDOWN The LM3402/02HV can be switched to a low power state (IINSD = 90 A) by grounding the RON pin with a signal-level MOSFET as shown in Figure 3. Low power MOSFETs like the 2N7000, 2N3904, or equivalent are recommended devices for putting the LM3402/02HV into low power shutdown. Logic gates can also be used to shut down the LM3402/02HV as LM3402/LM3402HV ered, making the magnetics smaller and less expensive. Alternatively, the circuit could be run at lower frequency but keep the same inductor value, improving the efficiency and expanding the range of output voltage that can be regulated. Both the peak current limit and the OVP/OCP comparator still monitor peak inductor current, placing a limit on how large iL can be even if iF is made very small. A parallel output capacitor is also useful in applications where the inductor or input voltage tolerance is poor. Adding a capacitor that reduces iF to well below the targ

UIT Figure 6 DS2505 Rx DATA 5A Ty TYP. 1000 q MOSFET V GROUND BUS MASTER CIRCUIT Figure 7 A) OPEN DRAIN 124 Yoo Yop BUS MASTER 10kO DSS000 OR 8051 EQUIVALENT > VPo300L 10k0. s OR 5ko | VP0106N3 D OR OPEN DRAIN BSS110 PORT PIN B $s D t pe TODATA CONNECTION 2N7000 OF DS2505 T 470 pF PGM CAPACITOR ADDED TO REDUCE COUPLING ON DATA LINE DUE TO 4 2N7000 PROGRAMMING SIGNAL SWITCHING B) STANDARD TTL Voo BUS MASTER iy Yoo = 0mAmin.) TTL-EQUIVALENT| ska PORT PINS PROGRAMMING PULSE og | | w TO DATACONNECTION Bx ps OF DS2505 [5 5ko y 091597 15/23DS2505 ROM FUNCTIONS FLOW CHART Figure 8 MASTER Tx A RESET PULSE DS2505 Tx PRESENCE PULSE ' MASTER Tx ROM FUNCTION COMMAND 33h READ ROM COMMAND 55h MATCH ROM COMMAND FOr SEARCH ROM COMMAND cth SKIP ROM COMMAND DS2505 Ty BIT 0 8 ME MY MASTER Ty BIT 0 DS2505 Tx BIT O 1 BYTE MASTER Ty BIT O BIT oO N N BITO MATCH? MATCH? DS2505 Ty BIT 1 DS2505 Tx SERIAL NUMBER MASTER Tx BIT 1 DS2505 Tx BIT 1 6 BYTES MASTER T BIT 1 N N DS2505 Ty CRC BYTE Y x DS2505 Ty BIT 63

hat the peak inductor or LED current does not exceed 300 mV / RSNS. LOW POWER SHUTDOWN The LM3402/02HV can be switched to a low power state (IINSD = 90 A) by grounding the RON pin with a signal-level MOSFET as shown in Figure 3. Low power MOSFETs like the 2N7000, 2N3904, or equivalent are recommended devices for putting the LM3402/02HV into low power shutdown. Logic gates can also be used to shut down the LM3402/02HV as LM3402/LM3402HV ered, making the magnetics smaller and less expensive. Alternatively, the circuit could be run at lower frequency but keep the same inductor value, improving the efficiency and expanding the range of output voltage that can be regulated. Both the peak current limit and the OVP/OCP comparator still monitor peak inductor current, placing a limit on how large iL can be even if iF is made very small. A parallel output capacitor is also useful in applications where the inductor or input voltage tolerance is poor. Adding a capacitor that reduces iF to well below the targ

0.010 0.011 0.002 CH06C Table Page 1 of 1 MainSupertex.gif Products.gif Selector_Side.gif ch06c.gif RDS(ON) Device Number BVDSS min (V) max () CISS typ (pf) VN0300 30 1.2 190 *3 VN0104 40 3.0 35 * VN3205 50 0.3 220 * VN0106 60 3.0 55 * VN2106 60 4.0 35 * 2N7000 60 5.0 60 *2 VN10K 60 5.0 60 * 2N7002 60 7.5 50 2N7008 60 7.5 50 *2 VN2222L 60 7.5 60 *3 VN13064 60 8.0 25 * VN2210 100 0.35 300 * VN2110 100 4.0 35 VN13104 100 8.0 25 VN2222 220 1.25 300 VN2224 240 1.25 300 * VN0550 500 60.0 45 * VN2450 500 13.0 150 * * VN2460 600 20.0 150 * * SOT-23 K1 TO-39 N2 TO-92 N3 Quad1 N6 SOT-89 N8 * * * * * * * Add package suffix for complete part number, e.g., VN0104N3 is VN0104 in a TO-92 package. Notes: 1. Package options are defined on individual data sheets. 2. No package suffix required. 3. Use package suffix "L" instead of "N3". 4. Not recommended for new designs. [Home] file://F:\export\projects\bitting2\imaging\BITTING\mail_pdf\recode\ch06c_table.htm 1/23/01

2N7000 N-Channel Enhancement-Mode Vertical DMOS FETs Features General Description The Supertex 2N7000 is an enhancement-mode (normallyoff) transistor that utilizes a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain Complementary N- and P-Channel devices Applications Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input imped