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s been given. Sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design applications because of obsolescence in the near future. Samples are no longer available. Date of status change: A6280EA-T September 3, 2013 A6280EESTR-T June 3, 2013 Deadline for receipt of LAST TIME BUY orders: November 29, 2013 Recommended Substitutions: For existing customer transition, and for new customers or new applications, contact Allegro Sales. NOTE: For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative. Allegro MicroSystems, LLC reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibili
14 Pages, 350 KB, Original
100% matte-tin leadframe plating. Applications include: Colored, large-character LED signs Scrolling, colored marquees Architectural lighting High intensity monochrome displays Large video and graphic displays Selection Guide Part Number Packing* Mounting A6280EA-T 25 pieces/tube 16 pin DIP A6280EESTR-T 1500 pieces/reel 16 pin QFN *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Load Supply Voltage Notes VIN Units 17 V Output Voltage VOUT -0.5 to 17 V Output Current IOUT 170 mA Ground Current IGND 600 mA VREG Pin VREG 6 V 7 V Logic Outputs OUT0, OUT1, OUT2 Rating VO CO, LO, OEO, SDO Logic Input Voltage Range VI CI, LI, OEI, SDI -0.3 to 7 V Operating Ambient Temperature TA Range E -40 to 85 C Maximum Junction Temperature TJ(max) 150 C Tstg -55 to 150 C Storage Temperature Thermal Characteristics Characteristic Symbol Test Conditions* RJA Package Thermal Resistance Rating Units Package A, 4 layer PCB 38 C/W 4-layer PCB based on JEDEC standard (estimate
13 Pages, 336 KB, Original
r regulator. The A6280 is supplied in a 16 pin dual in line (DIP) package (suffix `A') package and in a 16 lead QFN (suffix `ES') package. The packages are lead (Pb) free with 100% matte-tin leadframe plating. Selection Guide Part Number Packing* Mounting A6280EA-T 25 pieces/tube 16 pin DIP A6280EESTR-T 1500 pieces/reel 16 pin QFN *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage VIN 17 V Output Voltage VO -0.5 to 17 V Output Current IO 170 mA Ground Current IGND 600 mA Logic Input Voltage Range VI Operating Ambient Temperature TA Maximum Junction Temperature -0.3 to 7 V -40 to 85 C TJ(max) 150 C Tstg -40 to 150 C Storage Temperature Range E Thermal Characteristics Characteristic Symbol Test Conditions* RJA Package Thermal Resistance Rating Units Package A, 4 layer PCB 38 C/W Package ES, 4 layer PCB 40 C/W Package ES, 1 layer PCB with 1 in2. Cu area 70 C/W *For additional information, refer to the Allegro website. Pow
12 Pages, 354 KB, Original
gulator. The A6280 is supplied in a 16 pin dual in line (DIP) package (suffix `A') package and in a 16 lead QFN/MLP (suffix `ES') package. The packages are lead (Pb) free with 100% matte-tin leadframe plating. Selection Guide Part Number Packing* Mounting A6280EA-T 25 pieces/tube 16 pin DIP A6280EESTR-T 1500 pieces/reel 16 pin QFN/MLP *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage VIN 17 V Output Voltage VO -0.5 to 17 V Output Current IO 170 mA Ground Current IGND 600 mA Logic Input Voltage Range VI Operating Ambient Temperature TA Maximum Junction Temperature -0.3 to 7 V -40 to 85 C TJ(max) 150 C Tstg -40 to 150 C Storage Temperature Range E Thermal Characteristics Characteristic Symbol Test Conditions* RJA Package Thermal Resistance Rating Units Package A, 4 layer PCB 38 C/W Package ES, 4 layer PCB 40 C/W Package ES, 1 layer PCB with 1 in2. Cu area 70 C/W *For additional information, refer to the Allegro website.
11 Pages, 401 KB, Original
gulator. The A6280 is supplied in a 16 pin dual in line (DIP) package (suffix `A') package and in a 16 lead QFN/MLP (suffix `ES') package. The packages are lead (Pb) free with 100% matte-tin leadframe plating. Selection Guide Part Number Packing* Mounting A6280EA-T 25 pieces/tube 16 pin DIP A6280EES-T 121 pieces/tube 16 pin QFN/MLP A6280EESTR-T 1500 pieces/reel 16 pin QFN/MLP *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage VIN 17 V Output Voltage VO -0.5 to 17 V Output Current IO 170 mA Ground Current IGND 600 mA Logic Input Voltage Range VI Operating Ambient Temperature TA Maximum Junction Temperature Storage Temperature -0.3 to 7 V -40 to 85 C TJ(max) 150 C Tstg -40 to 150 C Range E Thermal Characteristics Characteristic Symbol Test Conditions* RJA Package Thermal Resistance Rating Units Package A, 4 layer PCB 38 C/W Package ES, 4 layer PCB 40 C/W Package ES, 1 layer PCB with 1 in2. Cu area 70 C/W *For additional
11 Pages, 422 KB, Original
100% matte-tin leadframe plating. Applications include: Colored, large-character LED signs Scrolling, colored marquees Architectural lighting High intensity monochrome displays Large video and graphic displays Selection Guide Part Number Packing* Mounting A6280EA-T 25 pieces/tube 16 pin DIP A6280EESTR-T 1500 pieces/reel 16 pin QFN *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Load Supply Voltage Notes VIN Units 17 V Output Voltage VOUT -0.5 to 17 V Output Current IOUT 170 mA Ground Current IGND 600 mA VREG Pin VREG 6 V 7 V Logic Outputs OUT0, OUT1, OUT2 Rating VO CO, LO, OEO, SDO Logic Input Voltage Range VI CI, LI, OEI, SDI -0.3 to 7 V Operating Ambient Temperature TA Range E -40 to 85 C Maximum Junction Temperature TJ(max) 150 C Tstg -55 to 150 C Storage Temperature Thermal Characteristics Characteristic Symbol Test Conditions* RJA Package Thermal Resistance Rating Units Package A, 4 layer PCB 38 C/W 4-layer PCB based on JEDEC standard (estimate
13 Pages, 334 KB, Original
or an external regulator. The A6280 is supplied in a 16-pin dual in-line (DIP) package (suffix `A') and in a 16-contact QFN (suffix `ES') package. The packages are lead (Pb) free with 100% matte-tin leadframe plating. Selection Guide Packing1 Part Number A6280EA-T A6280EESTR-T2 Mounting 25 pieces/tube 16 pin DIP 1500 pieces/reel 16 pin QFN 1Contact Allegro for additional packing options. is in production but has been determined to be LAST TIME BUY. This classification indicates that the variant is obsolete and notice has been given. Sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications because of obsolescence in the near future. Samples are no longer available. Status date change June 3, 2013. Deadline for receipt of LAST TIME BUY orders is November 29, 2013. 2Variant Absolute Maximum Ratings Characteristic Load Supply Voltage Output Voltage Symbol Notes VIN OUT0, OUT1, OUT2 VOUT Rating Units 17 V -0.5 to 17
13 Pages, 337 KB, Original
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