20 20 20 20 20 20 16 16 20 20 20 20 20 20 20 20 20 20 20 20 14 HD74AC373FPEL -- HD74ACT86FP Orderable Part Number HD74AC373FPEL HD74AC373P HD74AC373RPEL HD74AC373TELL HD74AC374FPEL HD74AC374P HD74AC374P HD74AC374RP HD74AC374RPEL HD74AC374TELL HD74AC74FPEL HD74AC74P HD74AC74RPEL HD74AC74TELL HD74AC86FPEL HD74AC86P HD74AC86P HD74AC86P HD74AC86P HD74AC86RP HD74AC86RP HD74AC86RP HD74AC86RP HD74AC86RPEL HD74ACT112RPEL HD74ACT138P HD74ACT138RPEL HD74ACT139P HD74ACT139RPEL HD74ACT161RPEL HD74ACT163RPEL HD74ACT164P HD74ACT164RP HD74ACT164RPEL HD74ACT240FPEL HD74ACT240P HD74ACT240RPEL HD74ACT240TELL HD74ACT244FPEL HD74ACT244P HD74ACT244RPEL HD74ACT244TELL HD74ACT245FPEL HD74ACT245P HD74ACT245P HD74ACT245P HD74ACT245RP HD74ACT245RPEL HD74ACT245TELL HD74ACT283P HD74ACT283RPEL HD74ACT373FPEL HD74ACT373P HD74ACT373RPEL HD74ACT373TELL HD74ACT374FPEL HD74ACT374P HD74ACT374P HD74ACT374P HD74ACT374RP HD74ACT374RP HD74ACT374RPEL HD74ACT374TELL HD74ACT86FP Competition Competitor Renesas Technology Corp. Renesas Tec
ar) sets Q to Low level Clear and Set are independent of clock Simultaneous Low on CD and SD makes both Q and Q High * Outputs Source/Sink 24 mA * Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC74P DIP-14 pin DP-14, -14AV P -- HD74AC74FPEL SOP-14 pin (JEITA) FP-14DAV FP EL (2,000 pcs/reel) HD74AC74RPEL SOP-14 pin (JEDEC) FP-14DNV RP EL (2,500 pcs/reel) HD74AC74TELL TSSOP-14 pin TTP-14DV T ELL (2,000 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement CD1 1 D1 2 CP1 3 14 VCC CP1 D1 SD1 CD1 Q1 Q1 SD1 4 12 D2 11 CP2 Q1 5 D2 CP2 10 SD2 Q1 6 CD2 SD2 9 Q2 GND 7 Q2 Q2 (Top view) Rev.2.00, Jul.16.2004, page 1 of 7 13 CD2 8 Q2 HD74AC74 Logic Symbol D1 SD1 Q1 D2 CP1 SD2 Q2 CP2 CD1 Q1 CD2 Q2 Pin Names D1, D2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q1, Q2, Q 2 Data Inputs
ar) sets Q to Low level Clear and Set are independent of clock Simultaneous Low on CD and SD makes both Q and Q High * Outputs Source/Sink 24 mA * Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC74P DIP-14 pin DP-14, -14AV P -- HD74AC74FPEL SOP-14 pin (JEITA) FP-14DAV FP EL (2,000 pcs/reel) HD74AC74RPEL SOP-14 pin (JEDEC) FP-14DNV RP EL (2,500 pcs/reel) HD74AC74TELL TSSOP-14 pin TTP-14DV T ELL (2,000 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement CD1 1 D1 2 CP1 3 14 VCC CP1 D1 SD1 CD1 Q1 Q1 SD1 4 12 D2 11 CP2 Q1 5 D2 CP2 10 SD2 Q1 6 CD2 SD2 9 Q2 GND 7 Q2 Q2 (Top view) Rev.2.00, Jul.16.2004, page 1 of 7 13 CD2 8 Q2 HD74AC74 Logic Symbol D1 SD1 Q1 D2 CP1 SD2 Q2 CP2 CD1 Q1 CD2 Q2 Pin Names D1, D2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q1, Q2, Q 2 Data Inputs