XCR3256XL-12CS280C
EE PLD, 12 ns, PBGA280

From Xilinx, Inc.

StatusACTIVE
Clock Freq-Max (fclk)88 MHz
Mfr Package Description0.80 MM PITCH, CSP-280
Number of Dedicated Inputs0.0
Number of Functions1
Number of I/O Lines164
Number of Terminals280
Operating Temperature-Max70 Cel
Operating Temperature-Min0.0 Cel
Organization0 DEDICATED INPUTS, 164 I/O
Output FunctionMACROCELL
Package Body MaterialPLASTIC/EPOXY
Package ShapeSQUARE
Package StyleGRID ARRAY, THIN PROFILE, FINE PITCH
Programmable Logic TypeEE PLD
Propagation Delay (tpd)12 ns
Supply Voltage-Max (Vsup)3.6 V
Supply Voltage-Min (Vsup)3 V
Supply Voltage-Nom (Vsup)3.3 V
Surface MountYes
TechnologyCMOS
Temperature GradeCOMMERCIAL
Terminal FinishTIN LEAD
Terminal FormBALL
Terminal Pitch0.8000 mm
Terminal PositionBOTTOM

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