XC3195-3PG223C User Programmable Gate Array
From Xilinx, Inc.
| @IOH (test) | 4.0m |
| @Iol (A) | 4.0m |
| Configurable Logic Blocks | 484 |
| Digital Input V Max (V) | 7.5 |
| Gate Capacity | 13500 |
| JEDEC Std 30 Outline Code | S-CPGA-P |
| Logic Level Family | CMOS and T |
| Maximum Toggle Rate | 270M |
| Military | N |
| Number of User I/Os | 176 |
| Package | PGA |
| Package Body Material | Ceramic |
| Pins | N/A |
| Program Data (Bits) | 94944 |
| Quiescent Current Max (CMOS) | 5m |
| Quiescent Current Max (TTL) | 14m |
| Technology | CMOS |
| V(OH)Min.(V)Hi Level Out.Volt. | 3.86 |
| V(OL)Max.(V)Lo Level Out.Volt. | 0.4 |
| VIH Min. (CMOS) (V) | 3.5 |
| VIH Min. (TTL) (V) | 2.0 |
| VIL Max. (CMOS) (V) | 1.0 |
| VIL Max. (TTL) (V) | 0.8 |
| Vsup (+) Maximum (V) | 7.0 |
| Vsup(+) Nom.(V) Pos.Sup.Volt. | 5 |
