LMC13204N
Quad SPST Nrm-Opn (Logic Level 0) Ana SW

From National Semiconductor

StatusDiscontinued
@I(S) (test) (A)1.0m
@Vd (test) (V)0
Analog Sw. Cur. P-P Max.20m
Control Logic Level High (V)2.0
Control Logic Level Low (V)0.8
FeaturesNorm-Open
MilitaryN
P(D) Max.(W) Power Dissipation500m
PackageDIP
Pins16
Sw. Volt P-P Max.(V)15
TechnologyCMOS
Vsup(+) Nom.(V) Pos.Sup.Volt.20
Vsup(-) Nom.(V) Neg.Sup.Volt.20
r(DS)on (Ohms)140
t(on) Max. (s) Turn-On Time550n

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