LMC13204N Quad SPST Nrm-Opn (Logic Level 0) Ana SW
From National Semiconductor
Status | Discontinued |
@I(S) (test) (A) | 1.0m |
@Vd (test) (V) | 0 |
Analog Sw. Cur. P-P Max. | 20m |
Control Logic Level High (V) | 2.0 |
Control Logic Level Low (V) | 0.8 |
Features | Norm-Open |
Military | N |
P(D) Max.(W) Power Dissipation | 500m |
Package | DIP |
Pins | 16 |
Sw. Volt P-P Max.(V) | 15 |
Technology | CMOS |
Vsup(+) Nom.(V) Pos.Sup.Volt. | 20 |
Vsup(-) Nom.(V) Neg.Sup.Volt. | 20 |
r(DS)on (Ohms) | 140 |
t(on) Max. (s) Turn-On Time | 550n |