EPM7160ELI84-10P Electrically-Erasable Switch Matrix PLD - Shareable/parallel expanders
From Altera
# of Cells (macros) Per Array | 16 |
# of Product Terms Per Array | 80 |
@Iol (A) | 12m |
Digital Input V Max (V) | 7.0 |
Military | N |
Nom. Supp (V) | 5 |
Number of I/O Terminals | 60 |
Number of Input Terminals | 4 |
Number of Output Terminals | 0 |
Output Config | 3-State |
Output Logic Polarity | Programmab |
Package | QCC-J |
Pins | 84 |
Technology | CMOS |
Total # of Logic Cell (macros) | 160 |
Total Number of Arrays | 10 |
Total Number of Product Terms | 800 |
V(OL)Max.(V)Lo Level Out.Volt. | 0.45 |
t(PHL) Maximum (S) | 10n |
t(PLH) Maximum (S) | 10n |