EP20K400FC672-3N LOADABLE PLD, 3.6 ns, PBGA672
From Altera Corporation
Status | ACTIVE |
Lead Free | Yes |
Mfr Package Description | FINE LINE, BGA-672 |
Number of Functions | 1 |
Number of I/O Lines | 502 |
Number of Terminals | 672 |
Operating Temperature-Max | 85 Cel |
Operating Temperature-Min | 0.0 Cel |
Organization | 502 I/O |
Output Function | MACROCELL |
Package Body Material | PLASTIC/EPOXY |
Package Shape | SQUARE |
Package Style | GRID ARRAY |
Programmable Logic Type | LOADABLE PLD |
Propagation Delay (tpd) | 3.6 ns |
Supply Voltage-Max (Vsup) | 2.62 V |
Supply Voltage-Min (Vsup) | 2.38 V |
Supply Voltage-Nom (Vsup) | 2.5 V |
Surface Mount | Yes |
Technology | CMOS |
Temperature Grade | OTHER |
Terminal Finish | TIN SILVER COPPER |
Terminal Form | BALL |
Terminal Pitch | 1 mm |
Terminal Position | BOTTOM |